Verilog Hdl: A Guide to Digital Design and Synthesis

by Samir Palnitkar

Verilog HDL is a language for digital design, just as C is a language for programming. This complete Verilog HDL reference progresses from the basic Verilog concepts to the most advanced concepts in digital design. Palnitkar covers the gamut of Verilog HDL fundamentals, such as gate, RTL, and behavioral modeling, all the way to advanced concepts, such as timing simulation, switch level modeling, PLI, and logic synthesis. Verilog HDL is a hardware description language (with a user community of more than 50,000 active designers) used to design and document electronic systems. This completely updated reference progresses from basic to advanced concepts in digital design, including timing simulation, switch level modeling, PLI, and logic synthesis.

Genres: Electrical Engineering

448 pages, Hardcover

First published January 15, 1996

Reviews

[Michael Frandsen · Rating 3 out of 5]

A good introduction to the Verilog language. Should I read a book in 2021 about Verilog, I would choose a book on SystemVerilog in stead.

[John Le Sage · Rating 5 out of 5]

This book is great, I read it cover to cover over a weekend before taking a Verilog class in grad school and it was a great leg up for the class. It has also been a valuable reference at work.

[Anam Shafiq · Rating 4 out of 5]

An excellent insight to Verilog HDL. As very less help is available regarding Verilog on the internet. This is indeed one of them.