What do you think?
Rate this book
A SystemVerilog Primer
- Written for new users. - Explains the language through simple examples. - Explains the syntax of language using commonly-used design terminology. - Based on IEEE 1800-2009 - Writing is made easier by providing a number of examples - Many hardware modeling examples also been provided to make this an excellent reference
350 pages, Hardcover
First published May 28, 2010
1 person is currently reading
18 people want to read
Ratings & Reviews
Friends & Following
Create a free account to discover what your friends think of this book!