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Inside the Machine: An Illustrated Introduction to Microprocessors and Computer Architecture
Computers perform countless tasks ranging from the business critical to the recreational, but regardless of how differently they may look and behave, they're all amazingly similar in basic function. Once you understand how the microprocessor-or central processing unit (CPU)-works, you'll have a firm grasp of the fundamental concepts at the heart of all modern computing. Inside the Machine , from the co-founder of the highly respected Ars Technica website, explains how microprocessors operate-what they do and how they do it. The book uses analogies, full-color diagrams, and clear language to convey the ideas that form the basis of modern computing. After discussing computers in the abstract, the book examines specific microprocessors from Intel, IBM, and Motorola, from the original models up through today's leading processors. It contains the most comprehensive and up-to-date information available (online or in print) on Intel's latest the Pentium M, Core, and Core 2 Duo. Inside the Machine also explains technology terms and concepts that readers often hear but may not fully understand, such as "pipelining," "L1 cache," "main memory," "superscalar processing," and "out-of-order execution." Includes discussion
320 pages, Hardcover
First published November 30, 2006
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Displaying 1 - 30 of 32 reviews
May 7, 2016
Just, WOW- didn't expect it to be that good, honestly one of the best reference books I've ever read (and I've read quite a few), Stokes have a tremendous amount of knowledge and he achieved, IMHO, an unprecedented writing on one of the most obscure and hard-to-teach topics of computer hardware - the CPU.
May 19, 2008
No deep detail, but a clear and concise presentation, with a very nice set of examples from several current processors -- a suitable, if less detailed, update to Tannenbaum's classic Structured Computer Organization.
January 28, 2014
This is a really good introductory Computer Architecture book. It is accessible and well laid out, and builds on foundations as it goes.
The only downside I would say is that the sections on the different architectures dragged a bit; I got a bit disinterested in the specific differences between the various different Motorola chipsets. That being said, it is important to see the evolution of the CPU and how the different manufacturers approached performance gains and how they handled the ever-increasing processor-memory gap.
The only downside I would say is that the sections on the different architectures dragged a bit; I got a bit disinterested in the specific differences between the various different Motorola chipsets. That being said, it is important to see the evolution of the CPU and how the different manufacturers approached performance gains and how they handled the ever-increasing processor-memory gap.
May 5, 2025
An awesome high-level intro to CPU microarchitectures. Stokes explains the fundamentals like pipelining, the instruction lifecycle and caches very clearly. The text is intuitive and is easy to go through. Illustrations are the best I’ve seen in any technical book.
Inside the Machine is unfortunately rather outdated, having been printed in 2007. For this reason, I skipped many of the details on specific processors. Still, the overarching fundamentals hold up well!
Inside the Machine is unfortunately rather outdated, having been printed in 2007. For this reason, I skipped many of the details on specific processors. Still, the overarching fundamentals hold up well!
October 16, 2024
dostoievski? nn🙅♂️
sci-fi? HELL NAWWW😤❌❌
murakami?nn😴
Inside the Machine: An Illustrated Introduction to Microprocessors and Computer Architecture?OUI✅👍
sci-fi? HELL NAWWW😤❌❌
murakami?nn😴
Inside the Machine: An Illustrated Introduction to Microprocessors and Computer Architecture?OUI✅👍
January 21, 2025
Summary notes here
The first 4 chapters act like a very quick overview of a freshman Computer Organisation course and the subsequent chapters dive more into the evolution of specific processor architectures.
I am sceptical of its practical usefulness but it was a fun and interesting read nonetheless. 4/5
The first 4 chapters act like a very quick overview of a freshman Computer Organisation course and the subsequent chapters dive more into the evolution of specific processor architectures.
I am sceptical of its practical usefulness but it was a fun and interesting read nonetheless. 4/5
October 10, 2014
Very informal and quite simplistic; still a good background summary of the major two desktop architectures of the last decade that does not require a lot of knowledge on the subject to grasp.
July 30, 2026
Chapters Read:
1. Basic Computing Concepts
2. The Mechanics of Program Execution
3. Pipelined Execution
4. Superscalar execution
5. The Intel Pentium and Pentium Pro
7. Intel's Pentium 4 vs. Motorola G4E: Approaches and Design Philosophies
9. 64-bit Computing and x86-64
11. Understanding Caching and Performance
Overall, I think it was a great book for understanding some older CPU design philosophies. One of the very unfortunate thing about this book is its age. Since older CPUs were less complex than modern ones, it does serve a great purpose of allowing the reader to focus on the bare-bones of CPU execution and layout. Unfortunately, I do not know how much this book would prepare me to look into current CPU design/techniques just due to it being 20 years old.
Things learned: Superscalar Execution, Branch Prediction hardware and the reason why pipeline bubbles are worse than I originally thought, how people felt when 64-bit computing was just coming out, and some caching details.
Superscalar execution: I think the author did a really good job of detailing the purpose of this technique and throughout the book, kept referring to this so that you got to see it in real processors (how the Intel Pentium 4 had multiple ALU, FPU, and Vector ALU) and the complications that arise from this technique. The reservoir metaphor I think served me well. We have to be loading/decoding instructions at the same or faster pace so that we are not wasting CPU cycles of the hardware not doing anything. Simple, but still have a lot of questions in practice (is load/decode hardware 2x faster when I have 2 ALUs? How in practice is the pipeline always full?). Would love to learn more about it.
Branch Prediction Hardware: I knew the purpose of branch prediction, but never how it was achieved. Having new hardware that includes a Branch History Table and a Branch Target Buffer was cool to learn about. I can't remember if it was in this book or if I looked it up by myself, but being able to understand how powerful but simple TAGE (Tagged Geometric Length) was cool. If we predicted it wrong, increase history size to make a better prediction next time. Static branch prediction is also cool to think about (if a JMP instruction is pointing to a lower address, we are probably in a loop and going to take it). Glad I learned more about this.
Pipeline Bubbles: I knew they were bad, but never truly rationalized that if a bubble occurs, it really screws a lot up. The book mentions that retrieving from L1 cache takes 3-5 cycles. I am curious how it stops bubbles when in best case, we have 2-4 wasted cycles waiting for response from L1. I would love to know more about the hardware that utilizes those 2-4 wasted cycles. How does it detect that we are waiting on L1/L2/RAM? How does it handle the process of switching off task? This part was also cool to understand that shorter clock/longer pipeline vs. shorter pipeline longer clock. I stupidly always just thought clock cycles a second dictated how "fast" a CPU was. Glad to be corrected on that. It seems that a lot of people had similar approaches since the Intel Pentium 4 highlighted its clock speed for the tradeoff of having a longer pipeline.
64-bit computer: Why 64-bit? 20 years ago, I guess it seemed that it wasn't as self evident as it is now. One interesting bit I still learned and makes a lot of sense: even if our ALU is 64 bits, a lot of the time we are operating on numbers that are 32 bit (since most applications do not have numbers larger than 2^32 - 1). Expansion on address space. Questions: how does the 64 bit ALU handle the 32 operations in hardware?
Caching: This is one of the places where I was hoping to learn the most and I was a little disappointed here. Stokes goes into N-way cache sets and LRU replacement policies, but I was really hoping to get into some gritty details here. Not a super lot of details and not a lot I didn't already know. One thing that was new to me was that L1 cache is a subset of L2 cache (everything in L1 is in L2). I want to know more about this. Why? Does this also hold for L3/RAM? Picking a good N for N-way sets was also interesting to me and the trade off for larger/smaller N. Would love to know what modern CPUs use (looked up and L1 8-12, L2/3 16-20, why those numbers).
Overall, great read. I will probably dive into Chapter 8 which details the backend of the Pentium 4. Wanted some more info on caching. Also, I feel like there were points where Stokes left out some very intersting follow-up conversation and hand-waved it with "too complicated to get into now". That is why I am reading the book, to get the details. Make it 4x the size and cost, I just want to know the details.
1. Basic Computing Concepts
2. The Mechanics of Program Execution
3. Pipelined Execution
4. Superscalar execution
5. The Intel Pentium and Pentium Pro
7. Intel's Pentium 4 vs. Motorola G4E: Approaches and Design Philosophies
9. 64-bit Computing and x86-64
11. Understanding Caching and Performance
Overall, I think it was a great book for understanding some older CPU design philosophies. One of the very unfortunate thing about this book is its age. Since older CPUs were less complex than modern ones, it does serve a great purpose of allowing the reader to focus on the bare-bones of CPU execution and layout. Unfortunately, I do not know how much this book would prepare me to look into current CPU design/techniques just due to it being 20 years old.
Things learned: Superscalar Execution, Branch Prediction hardware and the reason why pipeline bubbles are worse than I originally thought, how people felt when 64-bit computing was just coming out, and some caching details.
Superscalar execution: I think the author did a really good job of detailing the purpose of this technique and throughout the book, kept referring to this so that you got to see it in real processors (how the Intel Pentium 4 had multiple ALU, FPU, and Vector ALU) and the complications that arise from this technique. The reservoir metaphor I think served me well. We have to be loading/decoding instructions at the same or faster pace so that we are not wasting CPU cycles of the hardware not doing anything. Simple, but still have a lot of questions in practice (is load/decode hardware 2x faster when I have 2 ALUs? How in practice is the pipeline always full?). Would love to learn more about it.
Branch Prediction Hardware: I knew the purpose of branch prediction, but never how it was achieved. Having new hardware that includes a Branch History Table and a Branch Target Buffer was cool to learn about. I can't remember if it was in this book or if I looked it up by myself, but being able to understand how powerful but simple TAGE (Tagged Geometric Length) was cool. If we predicted it wrong, increase history size to make a better prediction next time. Static branch prediction is also cool to think about (if a JMP instruction is pointing to a lower address, we are probably in a loop and going to take it). Glad I learned more about this.
Pipeline Bubbles: I knew they were bad, but never truly rationalized that if a bubble occurs, it really screws a lot up. The book mentions that retrieving from L1 cache takes 3-5 cycles. I am curious how it stops bubbles when in best case, we have 2-4 wasted cycles waiting for response from L1. I would love to know more about the hardware that utilizes those 2-4 wasted cycles. How does it detect that we are waiting on L1/L2/RAM? How does it handle the process of switching off task? This part was also cool to understand that shorter clock/longer pipeline vs. shorter pipeline longer clock. I stupidly always just thought clock cycles a second dictated how "fast" a CPU was. Glad to be corrected on that. It seems that a lot of people had similar approaches since the Intel Pentium 4 highlighted its clock speed for the tradeoff of having a longer pipeline.
64-bit computer: Why 64-bit? 20 years ago, I guess it seemed that it wasn't as self evident as it is now. One interesting bit I still learned and makes a lot of sense: even if our ALU is 64 bits, a lot of the time we are operating on numbers that are 32 bit (since most applications do not have numbers larger than 2^32 - 1). Expansion on address space. Questions: how does the 64 bit ALU handle the 32 operations in hardware?
Caching: This is one of the places where I was hoping to learn the most and I was a little disappointed here. Stokes goes into N-way cache sets and LRU replacement policies, but I was really hoping to get into some gritty details here. Not a super lot of details and not a lot I didn't already know. One thing that was new to me was that L1 cache is a subset of L2 cache (everything in L1 is in L2). I want to know more about this. Why? Does this also hold for L3/RAM? Picking a good N for N-way sets was also interesting to me and the trade off for larger/smaller N. Would love to know what modern CPUs use (looked up and L1 8-12, L2/3 16-20, why those numbers).
Overall, great read. I will probably dive into Chapter 8 which details the backend of the Pentium 4. Wanted some more info on caching. Also, I feel like there were points where Stokes left out some very intersting follow-up conversation and hand-waved it with "too complicated to get into now". That is why I am reading the book, to get the details. Make it 4x the size and cost, I just want to know the details.
January 31, 2026
"Any sufficiently advanced technology is indistinguishable from magic." - Arthur C. Clarke.
CPUs and computers were always a kind of magic to me (even though I've spent a bit of time working with them). This book gave me a much needed introduction to the lower layers of this "black box", namely the way CPUs work. I really enjoyed the way it was described, with multiple analogies, examples, visualizations, relevant history of different CPUs and repetitions (where it was needed).
The most fascinating thing for me was, that so many of the concepts are almost the same on different levels: caching, queuing, parallelisation, scheduling. It feels like there is something fundamental in these approaches, causing them to appear again and again in different computational problems.
The only problem with this books is that it is quite dated at the moment. It would be interesting to see the advances made in the CPU industry over the last 20 years (including ARM processors, advanced speculative execution techniques, Spectre and Meltdown vulnerabilities).
CPUs and computers were always a kind of magic to me (even though I've spent a bit of time working with them). This book gave me a much needed introduction to the lower layers of this "black box", namely the way CPUs work. I really enjoyed the way it was described, with multiple analogies, examples, visualizations, relevant history of different CPUs and repetitions (where it was needed).
The most fascinating thing for me was, that so many of the concepts are almost the same on different levels: caching, queuing, parallelisation, scheduling. It feels like there is something fundamental in these approaches, causing them to appear again and again in different computational problems.
The only problem with this books is that it is quite dated at the moment. It would be interesting to see the advances made in the CPU industry over the last 20 years (including ARM processors, advanced speculative execution techniques, Spectre and Meltdown vulnerabilities).
May 2, 2022
As I went through this Book.
I had to pause many times, focus on imagining.
Fun imagination, no particular order
Connecting each layer of Abstraction, I tried to imagine to the most foundational level.
1. I imagined, 0101010, being manipulated with operations of many types
2. These 01010101 are being created by DC current
3. I imagined, 01010101 represented as data of various types
4. I imagined, different types of architecture alongside with CPU
5. CPU is where, all the (1) is being tasked yet
6. Find limtations of architectures, either improve by making things smaller or organizing it efficiently
7. Load up a small program into this [again], to create dividing resources of CPU
Yawns!
Now, I am tired, I'll get back to this again.
Deus Vult,
Gottfried
I had to pause many times, focus on imagining.
Fun imagination, no particular order
Connecting each layer of Abstraction, I tried to imagine to the most foundational level.
1. I imagined, 0101010, being manipulated with operations of many types
2. These 01010101 are being created by DC current
3. I imagined, 01010101 represented as data of various types
4. I imagined, different types of architecture alongside with CPU
5. CPU is where, all the (1) is being tasked yet
6. Find limtations of architectures, either improve by making things smaller or organizing it efficiently
7. Load up a small program into this [again], to create dividing resources of CPU
Yawns!
Now, I am tired, I'll get back to this again.
Deus Vult,
Gottfried
June 27, 2023
I finally understand these processor terms I've heard so often ("pipelines", "branch-prediction", etc.) The subject matter is pretty dry and I think it's also pretty hard to describe. We're talking about the functioning of a machine that uses microscopic parts to perform actions that are completely invisible to the eye, at speeds that are difficult to even conceptualize. I won't lie to you: I found this a bit of a chore to get through, but Stokes does a good job applying various analogies to make it clear how and WHY certain choices are made and how those choices affect speed, efficiency, programmer comfort, and power usage. Don't let the date put you off, the things that are true in this book are still true. Sure, I'd love it if there was an additional chapter on the the innovations between 2006 and today (2023), but there isn't. I'm happy to have learned what I learned.
March 10, 2025
The book was just about all that a novice in the world of computer architecture could hope to encounter as a first introduction. The author does an excellent job of making sure that everything is very well explained before expanding upon it, complete with visual representations for anything that could reasonably thought to be too complex for a textual description. My only critique is that in the chapters where Stokes explains the design and implementation of the different Pentium and PowerPC lines of processors, he goes into too much detail about the very specifics of each. It can get to be a lot of information to try and refer back to by the time he is done explaining the back ends between the two lines.
November 22, 2025
Excellent deep dive into computer architecture, and way deeper than I was expecting to go. The book takes its time to really drive its points home, with excellent analogies and case studies. I was left with more questions than answers (a good thing, because I learned more outside of the book) and have a better understanding of the little chip that does math in my laptop.
The case studies were fun. The book was written in the early 2000s, so when he mentions the “stratospheric” clock speeds of the Pentium 4 (at 1.7GHz), it bent my mind that your average modern desktop can operate at double that on more cores.
A bit dry at times, but that’s to be expected for such a thorough and in-the-weeds discussion of a narrow topic.
The case studies were fun. The book was written in the early 2000s, so when he mentions the “stratospheric” clock speeds of the Pentium 4 (at 1.7GHz), it bent my mind that your average modern desktop can operate at double that on more cores.
A bit dry at times, but that’s to be expected for such a thorough and in-the-weeds discussion of a narrow topic.
March 5, 2020
An astonishingly informative romp through recent microprocessor history (1990's - 2006). The author goes through the basics of microprocessors and subsequently builds upon that knowledge base by exploring eras of microprocessor history and improvements. Although slightly repetitive at times (mostly due to the subject), he explores and easily explains microarchitecture design and implementation and contrasts CISC vs. RISC instruction sets (with an obvious penchant for one of them).
Surprisingly easy to understand, and definitely satiated my appetite for technical knowledge on how the beating heart of computers functions, without going into too much detail.
Surprisingly easy to understand, and definitely satiated my appetite for technical knowledge on how the beating heart of computers functions, without going into too much detail.
January 14, 2022
I got what I wanted out of this book. It's a high level look at how microprocessors work. First part covers the basics of microprocessors, while the second part covers how specific processors where designed from the 90s and early 2000s. I skimmed through the second half of the book, as I felt it wasn't necessary to learn every detail of every design decision. However, it gave me a high level refresher course into computer architecture and some historical context on how processors came to be today.
June 8, 2026
Perfect for developing a system-level understanding of how microprocessors work. If you're looking for a deeper dive, I’d recommend Computer Organization and Design RISC-V Edition: The Hardware Software Interface (4.5/5).
December 2, 2019
This books is a nice read for someone who wishes to know more about how computer processors works. It's a shallow introduction to computer architecture and organization.
Similar books:
Computer Architecture: A Quantitative Approach
Computer Organization and Design: The Hardware/Software Interface
Similar books:
Computer Architecture: A Quantitative Approach
Computer Organization and Design: The Hardware/Software Interface
December 9, 2025
Excellent read. Though the processors discussed are ancient by modern standards, the fundamental concepts remain relevant. The book serves as a nice introduction to computer architecture and highlights the programmer’s interface to it.
A modern version covering the modern RISC chips (like Apple’s M-series chips) or NVIDIA’s GPUs would be awesome.
A modern version covering the modern RISC chips (like Apple’s M-series chips) or NVIDIA’s GPUs would be awesome.
November 25, 2025
I enjoyed reading this book even though it sticks to older CPU architectures. The examples are mostly from the Pentium and early powerPC days however the way it explains things like pipelines and caching and execution flow is so clear that the age of the hardware doesn't matter
June 9, 2017
Brilliant introduction to the subject.
August 6, 2020
Insightful
September 13, 2020
Excellent book. Excellent introduction to the basics of microprocessor. Every programmer needs to read it
April 12, 2023
Really good insight to how a computer works - split up very well as a plus:)
July 26, 2024
This was still relevant in 2024 and answered a lot of my residual questions following my "Introduction to Computer Architecture and Organization" class
January 29, 2025
Very detailed but accessible introduction to computer architecture and microprocessors.
October 31, 2025
Quick and dirty introduction to CPU basics: superscalar, pipelining, simple cache mechanics, 64 vs 32 bit architectures. Extremely digestible, but definitely entry level. Many historical asides embedded within the text, which are interesting if you care about that. The chapters dedicated to specific CPUs of the time (written 2006) didn't provide much value so I skipped them. Overall, a good refresher of modern CPU design principles.
April 22, 2026
Good stuff.
March 10, 2022
كتاب رائع يكشف لنا داخل الحاسوب وخصوصا تفاصيل عمل المعالج والذاكرة انصح به المبتدئين في علوم الحاسب
December 31, 2025
This book is an excellent introductory resource to computer architecture. I would have liked if it had gone more in-depth at parts, but still a really solid primer for further studying
Displaying 1 - 30 of 32 reviews