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Simulating Shared-Memory Parallel Computers
Explore how Washcloth lets you simulate shared-memory parallel machines and study their behavior before building real hardware.
The Washcloth simulator provides a flexible, high-level tool for computer architecture research. It runs on classic machines and models asynchronous processing elements, global and local memory, and the interconnection networks that tie them together. The tool supports writing programs in high-level languages, with synchronization added through special instructions and library routines. It also collects statistics on running time, memory accesses, and instruction activity to help compare design choices.
Simulates multiple architectures, including ultrafast interconnects and memory models similar to shared-memory MIMD systems. Supports performance metrics gathering and post-processing to inform high-level design decisions. Allows high-level programming with assembly-level synchronization hints and optional custom hook routines for statistics. Incorporates synchronization primitives such as read-modify-write operations and a fetch-and-add primitive to model parallel behavior. Ideal for readers of computer architecture or students exploring parallel computer design and simulation tooling.
The Washcloth simulator provides a flexible, high-level tool for computer architecture research. It runs on classic machines and models asynchronous processing elements, global and local memory, and the interconnection networks that tie them together. The tool supports writing programs in high-level languages, with synchronization added through special instructions and library routines. It also collects statistics on running time, memory accesses, and instruction activity to help compare design choices.
Simulates multiple architectures, including ultrafast interconnects and memory models similar to shared-memory MIMD systems. Supports performance metrics gathering and post-processing to inform high-level design decisions. Allows high-level programming with assembly-level synchronization hints and optional custom hook routines for statistics. Incorporates synchronization primitives such as read-modify-write operations and a fetch-and-add primitive to model parallel behavior. Ideal for readers of computer architecture or students exploring parallel computer design and simulation tooling.
16 pages, Paperback
Published August 24, 2018
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