Functional verification is an art as much as a science. It requires not only creativity and cunning, but also a clear methodology to approach the problem. The Open Verification Methodology (OVM) is a leading-edge methodology for verifying designs at multiple levels of abstraction. It brings together ideas from electrical, systems, and software engineering to provide a complete methodology for verifying large scale System-on-Chip (SoC) designs. OVM defines an approach for developing testbench architectures so they are modular, configurable, and reusable. This book is designed to help both novice and experienced verification engineers master the OVM through extensive examples. It describes basic verification principles and explains the essentials of transaction-level modeling (TLM). It leads readers from a simple connection of a producer and a consumer through complete self-checking testbenches. It explains construction techniques for building configurable, reusable testbench components and how to use TLM to communicate between them. Elements such as agents and sequences are explained in detail.
Read this for work over the past few weeks. It started out giving great background and explanations for why you'd use each feature of the OVM as it was introduced, but then in the middle the author apparently gave up on that technique and just dumped all the rest of the OVM features on you. I was left wondering why you'd ever use analysis ports over the other port types, what good the factory was, or why exactly modports where necessary at all (still not sure on that one actually). He tried to bring the explanations back for the last few chapters, but I was kind of lost by then. I had to give in and code up my own example design to finally see a reason for all the stuff dumped on me in the middle of the book, which was good, but after being spoiled in the first few chapters I resented it a little.